PhotonIcs and Electromagnetics Research Symposium,
also known as Progress In Electromagnetics Research Symposium
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Published by The Electromagnetics Academy
Published: 2015-07-09
A 4 MHz-10-GHz, 10-ps/dec Dynamic Comparator Using Negative Resistance Combined with CMOS Input Pair
By
M. Dashtbayazi,
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    M. Dashtbayazi

    Ferdowsi University of Mashhad, Iran

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S. Marjani,
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    S. Marjani

    Nuclear Science and Technology Research Institute (NSTRI), Iran

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Masoud Sabaghi
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    Masoud Sabaghi

    Nuclear Science and Technology Research Institute (NSTRI), Iran

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Proceedings of 2015 Photonics & Electromagnetics Research Symposium, Prague, July 6 - 9，Page(s)831-834
Abstract
A high speed, low delay/log (∆Vin) dynamic comparator using negative resistance combined with CMOS input differential pair is proposed and designed in IBM 180 nm CMOS process technology.
Citation
M. Dashtbayazi, S. Marjani, and Masoud Sabaghi, "A 4 MHz-10-GHz, 10-ps/dec Dynamic Comparator Using Negative Resistance Combined with CMOS Input Pair," Proceedings of 2015 Photonics & Electromagnetics Research Symposium, Prague, July 6 - 9，Page(s)831-834
References

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